Controlled current source; in particular for digital/analogue converters in continuous-time sigma/delta modulators

ABSTRACT

The present invention relates to a controlled current source having a control input, in particular for digital/analogue converters in continuous-time sigma/delta modulators, having a current source ( 4 ) with a control input which generates an output current dependent on a control voltage applied to the control input, and having a controller ( 7 ) for converting a clock signal into a voltage signal, with the controller ( 7 ) being connected to the current source ( 4 ) in such a manner that the voltage signal is applied as a control voltage to the control input of the current source ( 4 ). The controller is designed to is designed to convert the clock signal into a voltage signal which has within a clock duration a reproducible curve ending with a falling flank. Using the present controlled current source in a digital/analogue converter in a feedback branch of a continuous-time sigma/delta modulator permits realizing a sigma/delta modulator which is essentially insensitive to clock jitter.

This application is a 371 of PCT/DE03/03321 filed Oct. 7, 2003.

TECHNICAL FIELD

The present invention relates to a controlled current source, whichgenerates an output current dependent on a control voltage applied at acontrol input, the controlled current source having a controller forconverting a clock signal into a voltage signal. The controller isconnected to the current source in such a manner that the voltage signalis applied to the control input of the current source as a controlvoltage. Furthermore, the invention relates to a digital/analogueconverter with the controlled current source, to a sigma/deltaanalogue/digital converter having a continuous-time sigma/deltamodulator with the digital/analogue converter as well as to a method ofoperation.

In recent years, new technologies permitted distinctly improvingsigma/delta analogue/digital converters as well as their main component,the sigma/delta modulator, with regard to resolution and conversionrates, making it possible to use sigma/delta analogue/digital convertersin applications ranging from high resolution audio converters to frontend circuits of mobile network systems (GSM,UMTS) and to interfaces incommunication and information technologies (DSL, cable). Theseapplications use very high conversion rates, which together with theresampling utilized in these systems require very high systemvelocities, respectively very high sampling frequencies, which on theother hand make very high demands on the individual components of thesigma/delta modulator.

PRIOR ART

Sigma/delta modulators have hitherto usually been realized timediscretely in switched capacitor (SC) technology. This technologypossesses good properties regarding component matching, simulateabilityand other features. The high speed requirements of the new applications,however, make it difficult to realize time-discrete sigma/deltamodulators, because, for one, the velocity demands on the SC systemcomponents are many times greater than the system velocity itself.Furthermore, the sampling/hold elements (S/H) are always more difficultto realize for high velocities and ultimately meeting the velocityrequirements leads to high current consumption, which in manyapplications, such as use in mobile systems, should be avoided.

For these and other reasons, so-called continuous-time sigma/deltamodulators utilizing resistance-capacitance integrators, GmC integratorsor the like have been developed. The system components of these circuitsare less critical with regard to velocity demands which make them suitedfor use in new fields of application in communication electronics. Onthe other hand, continuous-time sigma/delta modulators are much moresensitive to some non-idealities in a daily industrial environment. Inthis, so-called clock jitter, ie. straggling of the system clockfrequency, plays a significant role. These fluctuations are not criticalin time-discrete sigma/delta modulators, because there all the signalshave assumed their final value before the system cycle switches the nexttime. In this case, the main source of error is falsified sampling ofthe input signal (S/H) due to clock jitter. In continuous-timesigma/delta modulators, however, this system cycle switches the feedbacksignal of the digital/analogue converter (DAC). In this case, stragglingswitching due to clock jitter results in a straggling feedback error,which can reduce the overall resolution of the system considerably.Depending on resolution realization, etc., the maximum tolerable clockjitter in continuous-time circuits is more than two to three decadesless than in a comparable time-discrete circuit.

FIG. 1 shows an example of a continuous-time sigma/delta modulator ofthe first order. The sigma/delta modulator is formed by an analogueintegrator 1, comprising an operation amplifier A and a capacitor C aswell as a downstream quantizer 2. After digital/analogue conversion, thedigital signal y(n) generated by the quantizer 2 is applied via afeedback branch 3 to the input of integrator 1 on which the input signalû(t) is also applied. The integrator 1 integrates the superimposedsignal. The output signal x^(t) of the integrator 1 is sampled with agiven clock frequency f_(S) and the sampled signal x(n) is digitalizedby the quantizer 2. Someone skilled in the art is familiar with theoperating manner of such a type sigma/delta modulator. In the exampleshown in FIG. 1, the digital/analogue converter of the feedback branch 3is formed by a voltage source U_(ref) whose voltage is switched betweentwo reference values dependent on the clock signal. However, if theclock duration varies due to clock jitter, a voltage pulse of varyinglength is generated, as shown in the diagram in FIG. 1, which shows thegenerated voltage signal y^(t) dependent on time. T_(s) indicates thedistance between two rising flanks of the clock signal, i.e. the clockduration. The varying length of the generated voltage pulse caused bythe clock jitter via which integration occurs in the integrator 1reduces the overall resolution of the system considerably, because theeffect of the clock jitter is very intensive particularly due to theintegration.

To alleviate this problem when using continuous-time sigma/deltamodulators, for example, in “Neue DAU-Rückkopplung fürzeitkontinuierliche SD-Modulatoren, ITG-Tagung, VDI, 2000 or in ClockJitter Insensitive Continous-Time ΣΔ Modulators”, InternationalConference and Electronics, Circuits and Systems, ICECS 01, M. Ortmannet al propose a digital/analogue converter in the feedback branch inwhich an additional capacity is utilized. Such a type of embodiment isshown schematically in FIG. 2. The capacity C_(R) is charged on one ofthe two feedback reference voltages based on the actual digital feedbackvalue. This capacity is then discharged via an additional resistanceR_(R) on the integrator 1 of the sigma/delta modulator. If the dischargetime of the capacity (C*R) is small enough compared to the clockduration, the feedback signal is independent of the variation of theoccurring clock duration, as is illustrated in the diagram in FIG. 2, inwhich for its part the feedback signal y^(t) is plotted dependent ontime. The clock duration T_(S) is indicated by the double arrow. Thefigure shows that the feedback signal y^(t) decreases from an initialmaximum value within the clock duration to a minimum value. The time ofthe decrease and the minimum value are selected in such a manner that avariation in the clock duration only minimally influences subsequentintegration via this feedback signal. The feedback signal is thuslargely independent of the change occurring in clock duration. Such atype technology for reducing clock jitter sensitivity in acontinuous-time sigma/delta modulator is also described in WO 00/36750.In this printed publication, the digital/analogue converter is realizedin the feedback branch by a capacitor, a resistance, two switches and adipolar switch which switches between the two reference voltages.

This technology has the advantage over time-discrete realizations ofsigma/delta modulators that the required slew rate of the employedamplifiers is distinctly reduced by the introduced resistance R_(R). Onthe other hand, however, the used amplifier must have a greaterbandwidth than conventional continuous-time modulators do in order to beable to charge the current pulse applied to it by the discharge of thecapacitor quickly to the integration capacitor. Not selecting thebandwidth of the amplifier large enough results, on the one hand, in amalfunction which influences the maximum resolution of the modulatorand, on the other hand, can also lead to artificial slowing down of thedischarge of the capacitor, which for its part can lead to greaterjitter sensitivity.

Another drawback of the aforementioned technology is that variable aspossible implementation of the described digital/analogue converterrequires for each feedback path a resistance, via which dischargingoccurs, as well as two capacitors which are charged to one of the tworeference voltages respectively and of which, dependent on the actualdigital modulator input clock signal, respectively output clock signal,one reference voltage is discharged over the resistance per cycle, whichincreases the number of components and thus the chip area required forproduction and thus creates additional costs.

The high signal peaks flowing on the integrator at the start of thedischarge result in changing its input voltage behavior. In particular,the input common mode voltage changes abruptly before it can be adjustedback to its actual value by the so-called common mode feedback (CMFB).If this takes longer than the duration of a cycle or the common modevoltage varies for other reasons from one cycle to the next, for exampledue to modulation of the amplifier, the feedback signal also varies,because the current i flowing to the integrator follows the equation:

$i = {\frac{V_{Ref} - V_{CM}}{R} \cdot {\mathbb{e}}^{\frac{t}{R \cdot C}}}$

V_(Ref) is one of the reference voltages, V_(CM) the amplifier commonmode voltage, R the feedback resistance and C the feedback capacitor. Itis readily evident that a variation of V_(CM) changes the feedbacksignal. However, that means that, dependent on the duration of the cyclewith the clock jitter, an error is introduced, which diminishes theresolution.

A further drawback of the described solution comes to light in so-calledmultibit realizations of the modulator, in which more than one bit isresolved inside the quantizer, increasing, on the one-hand, thestability and, on the other hand, the resolution of the modulator.However, this places high demands on the linearity of thedigital/analogue converter in the feedback branch, which now must havethe linearity of the entire system. Some realizations of this technologyprovide for a convenient layout by dividing the feedback elements intounit elements and statistically distributing these elements on theexistent area in order to obtain equidistant digital/analogue convertersteps. Moreover, there are prior art techniques that interconnect theunit sources quasi accidentally to the desired value in order to averageout the error in this manner. One such technique, for example, is knownunder the term dynamic element matching. In all these techniques, withthe hitherto solution of the clock jitter insensitive digital/analogueconverter, one faces enormous problems, because two elements, resistanceand capacitor, must be embedded with other unit elements of this type inthe existent technology.

Based on this state of the art, the object of the present invention isto provide a device that permits the realization of a digital/analogueconverter for a continuous-time sigma/delta modulator in which thecontinuous-time modulator shows less sensitivity to clock jitter. Theaforementioned disadvantages should also be avoided with thisdigital/analogue converter.

SUMMARY OF THE INVENTION

The object of the present invention is achieved with the controlledcurrent source described in claim 1. The claims 5, 7 and 11 describe adigital/analogue converter, a sigma/delta analog/digital converter and amethod of operation, in which the proposed current source is utilized toreduce sensitivity to clock jitter.

The present controlled current source, in particular fordigital/analogue converters in continuous time sigma/delta modulators,having a control input which generates an output current dependent on acontrol voltage applied to the control input, is provided with acontroller for converting a clock signal into a voltage signal, with thecontroller being connected to the current source in such a manner thatthe voltage signal is applied as a control voltage to the control inputof the current source. The controlled current source is distinguished bythe controller being designed to convert the clock signal into a voltagesignal which has within a clock duration a reproducible curve which endswith a falling flank.

In this controlled current source, the control voltage, which usually isthe gate/base voltage of the current source, is not held constant overthe entire clock period, but rather is reproducibly fed with a fallingsignal flank. This signal flank must limit the current within a clockcycle to sufficiently small values so that any premature or delayedswitching-off due to clock jitter causes a sufficiently small error in adownstream application which requires provision of constant currentpackages independent of clock jitter.

In a preferred embodiment, to convert a digital signal into a currentsignal, the controlled current source is implemented in adigital/analogue converter, hereinafter referred to as current sourcedigital/analogue converter. The digital signal is connected to thecurrent source or to the controller. The error clock jitter causes inthe integrator of a continuous-time sigma/delta modulator can be keptvery small in this manner and consequently remains without any effect.

If such a type digital/analogue converter is used in the feedback branchof a sigma/delta modulator, the feedback signal, respectively thefeedback current is directly generated by switching the current sourceon or off. This method is very insensitive to voltage fluctuations atthe integrator input as the desired current from a current source isideally supplied independent of the voltage applied thereto.Furthermore, current source digital/analogue converters can beimplemented very well as multibit digital/analogue converters, becauseunit current sources, usually transistors, are employed. All the priorart linearization techniques can continue to be utilized. Moreover,using current source digital/analogue converters results in a reductionof the chip area required for fabrication, which saves production costs.Due to the generation of a control voltage for the current source bymeans of a voltage pulse, which reproducibly falls within the clockduration via a falling flank from a maximum value to a minimum value,the output current of the current source also has such a falling flank.In this manner, it is achieved that the error caused by improperswitching of the system cycle due to clock jitter is sufficiently small.With favorable setting of the falling flank and of the minimum value,the influence of the error on the resolution of the sigma/deltamodulator is negligible as the fluctuations only affect in the range ofthe minimum value and therefore do not cause any major deviations in anintegration.

The proposed implementation of a digital/analogue converter equippedwith a controlled current source according to the present invention in asigma/delta modulator is very simple as usual perhaps even alreadyimplemented current source digital/analogue converters including all thelinearization techniques, single bit and multibit, can be employed. Forclock jitter insensitive implementation, the falling flank must only bereproducibly provided, in the ideal case only once for the entiremodulator. The current pulse supplied by the current source is largelyindependent of the common-mode-input voltage (V_(CM)) of the integrator.Feedback due to the fluctuations V_(CM) will, therefore only vary alittle in the real implementation, which again results in improvedjitter insensitivity.

In implementation of the sigma/delta modulator with Gm-C integrators,the current source can also be connected directly to the integrationcapacitors of the modulator, respectively to the Gm-C integrators, whichthen integrate the current up to the output voltage. The Gm cell toconvert the input voltage signal into a proportional current is notburdened by the high feedback current pulse so that it only has to beprovided with a conventional low slew rate and a small bandwidth.

Transistors which run in saturation operation are preferably utilized asthe current source, respectively the current sources. In a MOStransistor, this saturation operation is realized by a drain-sourcevoltage, which is greater than the effective gate-source voltage. Theoutput current is largely independent of the drain-source voltage. Thetransistor is applied with the emitter (source) at the constantpotential, the collector (drain) at the to-be-supplied node, inparticular at the integration inputs of the modulator, and with the base(gate) at the control potential of the controller. The potential at thebase in conjunction with the W/L ratio of the transistor sets the outputcurrent with the reproducible falling flank of the current sourcerealized in this manner. In the present case, this potential is variedwithin a clock duration in such a manner that it falls from a maximumvalue to a minimum value.

Moreover, other circuits, which for example realize an improved currentsource with a higher inner resistance by means of a cascode transistoror in the form of a current source realization according to Wilson orWidlar, can of course also be employed. The essential feature of thepresent digital/analogue converter is not the actual current source butrather the controller which triggers the current source with the fallingcontrol voltage.

The controller can be realized in various ways. Any controller thatsupplies a reproducible voltage which either first rises and thenreproducibly falls again to the initial value or that starts at astarting value and falls to an end value. The precondition is that thevalues in each clock phase within modulator resolution are the same andthat the value applied as the control signal to the current source atthe end of a clock phase generates a sufficiently low current in such amanner that a wrong switching time point of the clock results in asufficiently small error.

An example of such a controller is a circuit comprising a capacitor Cand a resistance R. The capacitor C is previously charged to thereference voltage and discharged over the resistance R to mass. Thedischarge voltage setting in is utilized as the control signal of thecurrent source digital/analogue converter.

In a further embodiment of the controller, a so-called slope converteris employed to obtain a defined rising and falling flank of the currentsource control signal, which may also run linearly. Such a slopeconverter can, for example, be a resistance-capacitance integratorhaving a voltage source or a current source with a charge capacity.First, the clock signal is integrated to a reference voltage value on acapacitor. After switching of a comparator, deintegration to generatethe falling flank occurs. Then, the integration capacity is dischargedto zero. This procedure is repeated in the next clock phase.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention is made more apparent in the following usingpreferred embodiments with reference to the accompanying drawings.

FIG. 1 shows an example of a state-of-the-art sigma/delta modulator;

FIG. 2 shows another example of a state-of-the-art sigma/deltamodulator, which is less sensitive to clock jitter;

FIG. 3 shows an example of the realization of a sigma/delta modulatorhaving a conventional state-of-the-art current source digital/analogueconverter;

FIG. 4 shows an example of an embodiment of a sigma/delta modulatorhaving a digital/analogue converter and a controlled current sourceaccording to the present invention;

FIG. 5 shows a further example of an embodiment of a sigma/deltamodulator having a digital/analogue converter and a controlled currentsource according to the present invention;

FIG. 6A and FIG. 6B show two examples of the design of the currentsource of the present digital/analogue converter; and

FIG. 7A, FIG. 7B and FIG. 7C show three examples of an embodiment of thecontroller for generating the control voltage in the presentdigital/analogue converter.

WAYS TO CARRYING OUT THE INVENTION

The embodiments of the known state-of-the-art sigma/delta modulatorsaccording to FIGS. 1 and 2 have already been described in detail in theintroductory part of the summary of the invention. FIG. 3 shows theembodiment of a sigma/delta modulator in which the digital/analogueconverter is provided with a current source 4 in the feedback branch. Inthis sigma/delta modulator as well, the input signal û(t) issuperimposed via a resistance R at the input of the integrator 1 of themodulator with the feedback signal. The integrator 1 comprises here tooan operating amplifier A and a capacitor C. The integrated output signalx^(t) is sampled by means of a clock frequency f_(s) and the samplingsignal x(n) is conveyed to a quantizer 2, which delivers a digitaloutput signal y(n). This digital output signal is fed back via thedigital/analogue converter to the input of the modulator. In thismanner, the current source 4 is switched on and off dependent on thedigital signal y(n) which acts as a clock signal.

The bottom part of this figure shows the clocked output signal î(t) ofthe current source dependent on time. As can clearly be seen,fluctuation in the duration of the clock signal influences the length ofthe generated current pulse, which can lead to considerable errors inthe subsequent integration in the modulator.

Use of a digital/analogue converter having a controlled current sourceaccording to the present invention distinctly reduces this sensitivityto clock jitter. FIG. 4 shows an example of the embodiment of thepresent digital/analogue converter according to the present invention,in which the integrator 1 and the quantizer 2 of the sigma/deltamodulator are realized in the same manner as in the embodiment of FIG.3. In this case, a digital/analogue converter 5 designed according tothe present invention is utilized only in the feedback branch 3. Thisdigital/analogue converter 5, for its part, is also provided with acurrent source 4, which in the present case is triggered by a controlvoltage v(t), which has a certain predefined curve. The control voltagev(t), which is generated by a special device (not depicted in thisfigure) of the present digital/analogue converter 5, is shownschematically in the bottom right part of the figure. In this example,the control voltage v(t) quickly rises at the beginning of a clockduration T_(s) to a maximum value and then falls with a defined fallingflank to a minimum value. Triggering the current source 4 with thiscontrol voltage v(t) yields a current pulse î(t) as shown in the diagramin the left part of the figure. Essentially, this current pulse has thetemporal course of the control voltage v(t). Due to this course of thecurrent pulse, fluctuation in the clock duration affects only one partof the current pulse, in which the current already has reached a verylow value. Integration over the current pulses as executed in themodulator, fluctuation in the clock duration does not or onlyinsignificantly influences the result. As a consequence, at disposal isa continuous-time sigma/delta modulator that is insensitive to clockjitter.

FIG. 5 shows another possibility of utilizing the presentdigital/analogue converter having a controlled current source in acontinuous-time sigma/delta modulator. In this case, the integrator ofthe sigma/delta modulator is formed by a Gm-C integrator 6, whichessentially is composed of a Gm cell and a capacitor connected to mass.In such an embodiment of the integrator of the sigma/delta modulator,the output signal, i.e. the output current pulse, of the inventeddigital/analogue converter can be applied directly to the capacitor C,via which the current then is integrated up to the output voltage. Thisembodiment has the advantage that the Gm cell does not need to beadapted to the feedback current pulse, i.e. does not need to have agreater bandwidth.

A sigma/delta modulator, as shown for example in FIGS. 1 to 5, inconjunction in a known manner with a downstream decimation filter yieldsa sigma/delta analogue/digital converter.

FIG. 6 shows two examples of a possible embodiment of the current source4 of the present digital/analogue converter 5.

FIG. 6 a) shows an exemplary implementation with MOS transistors. D isthe digital modulator output and î the feedback current of the twopreceding figures. V_(slope,p) and V_(slope,n) represent the voltageflanks of the control voltage v(t) formed according to the presentinvention which trigger the respective transistor current. The lattermust be selected in such a manner that the feedback current is reducedsufficiently at the switch-off time point of the clock cycle so thatclock jitter has no effect. Vss and Vdd are the operating voltages ofthe transistors or other reference voltages.

FIG. 6 b) shows an exemplary implementation of the current source 4 ofthe digital/analogue converter 5 having MOS transistors for fullydifferential architecture. Thus, so-called fully differentialamplifier/integrators/Gm cells are employed in which both a positive anda negative input and output are used for signal conveyance. Thedigital/analogue converter 5 can therefore be implemented in the showncircuit by means of suited switching of the current sources. In thiscase, î_(n)(t) and î_(p)(t) are the feedback currents on thecorresponding input of the modulator. The other references have alreadybeen explained in the description of part a of the figure.

FIG. 7 shows three examples of a possible embodiment of the controller 7for generating the control voltage in the present digital/analogueconverter 5, respectively of the controlled current source.

FIG. 7 a shows an exemplary implementation of the controller 7 forgenerating an exponential trigger voltage V_(slope, Exp)(t) for thetransistor current sources 4 by means of a resistance-capacitor circuit.V₁ and V₂ are the beginning voltage and the end voltage of the dischargestep. φ₁ is a clock signal so that the capacitor C is charged during thefirst clock phase and discharged during the second clock phase over theresistance R. This cycle can be the system cycle. Voltages V₁, and V₂must be selected different for p-channel transistors and n-channeltransistors (n: V₁>V₂, p: V₁<V₂). In this embodiment the temporal courseof the output voltage is exponential.

FIG. 7 b) shows an exemplary implementation of the controller 7 forgenerating a linear trigger voltage V_(Slope,Lin)(t) for the transistorcurrent sources 4. V₁ and V₂ are for their part the beginning voltageand the end voltage of the discharge step. φ₁ is a clock signal so thatthe capacitor C is charged during the first clock phase and dischargedduring the second clock phase via the constant current source I_(const).This cycle can be the system cycle. The voltages V₁ and V₂ and thecurrent I_(const) must be selected different for p-channel transistorsand n-channel transistors. In this embodiment the temporal course of theoutput voltage is linear.

FIG. 7 c) shows an exemplary implementation of the controller 7 forgenerating a linear trigger voltage V_(Slope,Lin)(t) for the transistorcurrent sources 4, in this case having a slope converter. V₁ is thebeginning voltage of the discharge step. φ₁ is a clock signal so thatthe capacitor C is charged during one clock phase and discharged duringthe second clock phase by the constant current source I_(const). Thiscycle can be the system cycle. The discharge step is stopped as soon asthe voltage over the capacitor C exceeds or falls under a certain valueV_(Ref). The voltages V₁ and V_(Ref) and the current I_(const) must beselected different for p-channel transistors and n-channel transistors.In this embodiment, too, the temporal course of the output voltage islinear.

In addition to these embodiments, other current sources and otherdevices familiar to someone skilled in the art which yield acorresponding temporal course of the control voltage v(t) dependent of aclock signal may, of course, also be utilized.

LIST OF REFERENCES

-   1 integrator-   2 quantizer-   3 feedback branch-   4 current source-   5 digital/analogue converter-   6 Gm-C integrator-   7 controller

1. A controlled current source having a control input, in particular fordigital/analogue converters in continuous-time sigma/delta modulators,which generates an output current dependent on a control voltage appliedto said control input, and having a controller for converting a clocksignal into a voltage signal, with said controller being connected tosaid current source in such a manner that said voltage signal is appliedas a control voltage to said control input of said current source,wherein said controller is designed to convert said clock signal into avoltage signal which has within a clock duration a reproducible curveending with a falling flank.
 2. A controlled current source according toclaim 1, wherein said controller comprises a capacitor and a resistance,which are connected in such a manner that said capacitor is dischargedover said resistance to ground, with the voltage over said resistancecorresponding to said voltage signal.
 3. A controlled current sourceaccording to claim 1, wherein said controller comprises a slopeconverter.
 4. A controlled current source according to claim 1, whereinsaid current source is formed by at least one transistor whose gateforms said control input.
 5. A digital/analogue converter, in particularfor continuous-time sigma/delta modulators, having a current sourceaccording to claim 1 for converting a digital signal into a currentsignal, with said digital signal being connected to said current sourceor said controller.
 6. A digital/analogue converter according to claim 5which is disposed in a feedback branch of a continuous-time sigma/deltamodulator.
 7. A sigma/delta analogue/digital converter having asigma/delta modulator which receives a feedback signal via a feedbackbranch, wherein in said feedback branch, a digital/analogue converteraccording to claim 5 is disposed, whose output current forms saidfeedback signal.
 8. A sigma/delta analogue/digital converter accordingto claim 7, wherein said sigma/delta modulator is a continuous-timesigma/delta modulator.
 9. A sigma/delta analogue/digital converteraccording to claim 7, wherein said digital/analogue converter isconnected to said sigma/delta modulator in such a manner that saidfeedback signal is applied to one integrator or a multiplicity ofintegrators of said sigma/delta modulator.
 10. A sigma/deltaanalogue/digital converter according to claim 7, wherein saidsigma/delta modulator is provided with a Gm-C integrator and saiddigital/analogue converter is connected to said sigma/delta modulator insuch a manner that said feedback signal is directly applied to acapacitor of said Gm-C integrator.
 11. A method of operating asigma/delta analogue/digital converter having a continuous timesigma/delta modulator, in which a feedback signal is generated for saidsigma/delta modulator by switching on and off dependent on a clocksignal of said sigma/delta modulator a current source, which supplies anoutput current dependent on a control voltage, wherein said controlvoltage of said current source is selected in such a manner that it haswithin each clock duration a reproducible curve which ends with afalling flank.
 12. A method according to claim 11, wherein said outputcurrent is directly applied to an input of an integrator of saidsigma/delta modulator.
 13. A method according to claim 11, wherein ifutilizing a Gm-C integrator in said sigma/delta modulator, said outputcurrent is directly applied to a capacitor of said Gm-C integrator. 14.A method according to claim 11, wherein a transistor circuit is utilizedas said current source.
 15. A method according to claim 11, wherein saidcontrol voltage of said current source is generated via aresistance-capacitance module.
 16. A method according to claim 11,wherein said control voltage of said current source is generated via aslope converter.